Compa
Compa Family CPLDs use mature processes and independent IP architecture to meet the requirements of low-power, low-cost and low-space design. It is suitable for system configuration, interface expansion and bridging, board-level power management, power-up timing management, sensor fusion and other application requirements, and can be widely used in fields such as Communications, Consumer, and Industrial Control applications.
Product Selection Guide
Device Number1 PGC1K PGC2K PGC4K PGC7K PGC10K
Logic resources logic Cell  1,276   2,428   4,761   7,104   9,907 
LUTs  1,064   2,024   3,968   5,920   8,256 
Flip-Flop  1,596   3,036   5,952   8,880   12,384 
RAM resources Distributed RAM(Kbit) 11 16 39 56 78
Embedded 9K block RAM 7 8 11 26 45
Memory blocks(Kbit) 63 72 99 234 405
Flash resources Maximum embedded Flash capacity available to users(Kbits)2  664   664   2,520   3,616   5,120 
Clock resources Phase Locked Loop (PLL)/Global Clock 1/16 1/16 2/16 2/16 2/16
IO resources IO Banks 4 6 6 6 6
Maximum user I/Os 207 207 280 336 384
Maximum differential pairs 14 14 18 21 24
Hard core resources I2C hard core 2 2 2 2 2
SPI hard core 1 1 1 1 1
Timer/counter hard core 1 1 1 1 1
On-chip oscillator 1 1 1 1 1
Package Dimensions(mm) Ball Pitch(mm) User IO / Differential pairs
UWG363 2.5 x 2.5 0.4 29/34
UWG49 3.2 x 3.2 0.4 39/5
UWG81 3.8 x 3.8 0.4 64/10
QFN32 5 x 5 0.5 21/0
QFN48 7 x 7 0.5 39/0
SSBG2563 9 x 9 0.5 207/14
LPG100 14 x 14 0.5 80/4 80/4
LPG144 20 x 20 0.5 112/9 112/9 115/9 115/9
MBG256 14 x 14 0.8 207/14 207/14 207/18 207/20
FBG256 17 x 17 1 207/14 207/14 207/18
SBG132 8 x 8 0.5 104/8
MBG324 15 x 15 0.8 280/18
MBG400 17 x 17 0.8 336/21 336/22
MBG484 19 x 19 0.8 384/24
Notes:
1、PGC1K/PGC2K support version G (General) and version L (Low-Power) devices; PGC4K supports version L and version D (Dual Boot function) devices; PGC7K/PGC10K support version D devices.
2、Remaining maximum Flash capacity when not using the Dual Boot function.
3、UWG and SSBG packages are only available in the 1.2 V low-voltage version.
4、29/3 means 29 user I/Os and 3 pairs of true differential output pins. Other numbers follow the same definition.
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